RISC-V Summit 2020
Virtual Event | Register Online | December 8-10 2020
RISC-V Summit 2020
Event Description:
The third annual RISC-V Summit will highlight the continued rapid expansion of the RISC-V ecosystem, presenting both commercial offerings and exciting open-source developments.
Newcomers to RISC-V, as well as the seasoned developers who are interested in broadening their toolsets, are invited to choose from the broad range of tutorials.
The comprehensive 100% virtual event will feature keynotes from industry pioneers as well as thought-provoking panel discussions. Network with thought-leaders, technology companies, and researchers spearheading the adoption of this evolutionary change in the silicon market.
OneSpin's Design Verification Product Manager Sven Beyer will be presenting on Thursday Dec. 10 2020 from 12:00 - 1:00 PM.
OneSpin Session --> CORE-V-VERIF, an Industrial-Grade Verification Platform for RISC-V cores
Access the full agenda here: https://tmt.knect365.com/risc-v-summit/agenda/1/
Event Details
Date:
Dec 7-11, 2020
Time
04:00 PM GMT
About The Event Host
RISC-V is a free and open ISA enabling a new era of processor innovation through open standard collaboration.The RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation. RISC-V International is a global nonprofit association based in Switzerland. Founded in 2015 as the RISC-V Foundation with 29 members, RISC-V is now a truly global organization with over 750 members in more than 50 countries. Join us today to become part of the RISC-V Revolution. Right here. Right now.
