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In the news

Using Software Approaches In Hardware Verification

By Ann Steffora Mutschler, Semiconductor Engineering

Agile development is gaining traction for developing hardware testbenches, but challenges remain.

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Sergio Marchese, technical marketing manager at OneSpin Solutions, noted that his company has adopted many Agile techniques for R&D. “On the hardware side, while there is some consensus that Agile can reduce development waste and foster a more co-operative working environment, there has been limited adoption. One of the exceptions is verification and, in particular, formal verification.”

As a verification engineer, he had a number of successful experiences applying Agile principles. “A key benefit of Agile hardware development is that the turnaround time to identify and fix a bug, and verify the new RTL version, can be reduced dramatically, from days to minutes in complex projects,” he said. (See Fig. 1.)

Formal verification tools enable this type of process. “Designers can use formal tools themselves to execute automated checks and quickly explore intricate design functions without the need of a simulation testbench,” Marchese said. “They also can work side-by-side with verification engineers to develop end-to-end assertions in a form of pair programming aimed at delivering correct code iterations. The ultimate measure of success is that traditional, non-Agile verification should then find few or no bugs at all.”

Still, this isn’t always so easy.

“While the hardware community has an increasing interest in Agile methodologies, fueled by its success in software projects, it is clear that Agile methodologies cannot be applied to hardware projects without some adaptation,” said Marchese. “Furthermore, companies aiming to fully embrace Agile need to change their engineering culture, which is a gradual and complex process.”

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The Fibonacci Calculator

Semiconductor Engineering logo

By Sergio Marchese, Semiconductor Engineering

The holiday season is all about traditions, and the annual holiday puzzle has become a tradition here at OneSpin. Two years ago, we challenged engineers everywhere to solve the famous Einstein’s Riddle using a formal tool. We received some interesting solutions. Last year, we drew an even bigger response to our invitation to tackle the “World’s Hardest Sudoku.” These puzzles are fun, of course, but the different approaches taken by those submitting solutions also reveal a lot about the power and flexibility of assertions and formal verification.

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What Is Artificial Intelligence?

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By Brian Bailey, Semiconductor Engineering

Artificial Intelligence (AI) has inspired the general populace, but its rapid rise over the past few years has given many people pause. From realistic concerns about robots taking over jobs to sci-fi scares about robots more intelligent than humans building ever smarter robots themselves, AI inspires plenty of angst.

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Debug Tops Verification Tasks

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By Ann Steffora-Mutschler, Semiconductor Engineering

There are a variety or reasons for this, including the fact that some SoCs are composed of hundreds of internally developed and externally purchased IP blocks and subsystems. New system architectures contribute to the mix, some of which are being developed to deal with an explosion of data. Add to that new packaging approaches, more complex interactions between different blocks and power domains, and an increasing emphasis on reliability for automotive and industrial applications, and the increased emphasis on debug begins to make sense.

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Fundamental Shifts In 2018

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By Brian Bailey, Semiconductor Engineering

What surprised the industry in 2018? While business has been strong, markets are changing, product categories are shifting and clouds are forming on the horizon.

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Designing For Ultra-Low-Power IoT Devices

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By Ann Steffora-Mutschler, Semiconductor Engineering

Optimizing designs for power is becoming the top design challenge in battery-driven IoT devices, boxed in by a combination of requirements such as low cost, minimum performance and functionality, as well as the need for at least some of the circuits to be always on.

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Fundamental Shifts in 2018

By Brian Bailey, Semiconductor Engineering

This will go down as a good year for the semiconductor industry, where new markets and innovation were both necessary and rewarded.

What surprised the industry in 2018? While business has been strong, markets are changing, product categories are shifting and clouds are forming on the horizon.

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But many people at least got a piece of this right. “We said that machine learning (ML) would present many new challenges for systems, semiconductor and EDA suppliers,” said Sergio Marchese, technical marketing manager at OneSpin Solutions. “Specific to EDA, we predicted that ML and AI would lead to an evolution in design practices and development tools. We are still in the early phases of this transition, but some changes are already clear. The statistical nature of ML means that bugs are more data-driven, leading to a new emphasis on verification of datapaths in addition to control logic. The floating-point unit formal app that we recently introduced is one example of this evolution.”

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Formal and Simulation Covered Together

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By Bryon Moyer, EE Journal

How do you know when your IC design is done? When can you declare verification victory? These are the questions that coverage is supposed to help with. When your verification has covered the entire circuit, for lack of a more precise way of articulating it, then you’re done. (At least, with that part of the verification plan…)

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