close By using this website, you agree to the use of cookies. Detailed information on the use of cookies on this website can be obtained on OneSpin's Privacy Policy. At this point you may also object to the use of cookies and adjust the browser settings accordingly.

In the news


A Deep Dive Into AI Chip Arithmetic Engines

By Sergio Marchese, Technical Marketing, OneSpin

Tesla’s autopilot chip executes 72-trillion additions and multiplications per second: It better get the math right...

ARTIFICIAL INTELLIGENCE (AI) is steadily progressing toward advanced, high-value applications that will have a profound impact on our society. Automobiles that can drive themselves are perhaps the most talked about, imminent technological revolution, but there are many more applications of AI.

AI software, such as a neural network (NN) implementing a machine learning (ML) or deep learning (DL) algorithm, requires high-performance “artificial brains,” or hardware, to run on. Computer vision is fundamental to many complex, safety-critical decision-making processes.

Read more

How to Automate Functional Safety

By Ann Steffora Mutschler , Semiconductor Engineering | Feat. Joerg Gross, Safety Product Manager, OneSpin

Experts at the Table: With both established companies and new players clamoring to play a role in the automotive space, how is the industry moving towards automation? (Part One)

Semiconductor Engineering sat down to discuss functional safety thinking, techniques and approaches to automation with Mike Stellfox, Fellow at Cadence; Bryan Ramirez, strategic marketing manager at Mentor, a Siemens Business; Jörg Grosse, product manager for functional safety at OneSpin Solutions; and Marc Serughetti, senior director of product marketing for automotive verification solutions at Synopsys. What follows are excerpts of that conversation.

[...]

Grosse: We want to automate the FMEDA [Failure modes, effects, and diagnostic analysis] process as much as possible. My personal opinion is that you can’t have an FMEDA tool. I don’t think that exists. You have to have several building blocks. You have to have a part for the hardware safety analysis, a part for dealing with the diagnostic coverage analysis determination, and also the part of the computational model. That’s where we are looking into it and automating this process.

 

Read more

We Need to Talk! Communication Needed Between Verification and Safety

By Bryon Moyer, Electronic Engineering Journal | Feat. Jörg Grosse, Product Manager Functional Safety, OneSpin

"What we have here is a failure to communicate." – Cool Hand Luke

"The farmer and the cowman should be friends." – Oklahoma

There are apparently a couple of silos in the EDA world that could use some breaking down.

- On one side, we have verification. This is a well-established discipline involving numerous EDA tools and a brief that compels verification engineers to make sure that a design does what it is intended to do.

- On the other side, we have safety engineering. This is a newer discipline to EDA, charged with making sure that a design won’t put someone or something in danger if things go awry.

Historically, safety has been limited to the rather rarified realms of aviation and military. Folks operating in those markets have been a different breed, sacrificing flexibility and agility for what many might see as a cumbersome, inefficient process of checks and cross-checks and adherence to what can be mind-numbing regulations, all designed to keep soldiers and aircraft passengers and, frankly, innocent bystanders, safe.

Read more

Debugging Complex SoCs | Experts at the Table, Part 1

By Brian Bailey, Semiconductor Engineering | Feat. Dominik Strasser, VP Engineering, OneSpin

Why time spent in debug is increasing, underlying trends, and what surveys do not reveal.

Semiconductor Engineering sat down to discuss the debugging of complex SoCs with Randy Fish, vice president of strategic accounts and partnerships for UltraSoC; Larry Melling, product management director for Cadence; Mark Olen, senior product marketing manager for Mentor, a Siemens Business; and Dominik Strasser, vice president of engineering for OneSpin Solutions. What follows are excerpts of that conversation.

[...]

Strasser: We do see new containers of bugs, like security and side-channel attacks. These are new concerns, and nobody has thought about these in the past. Suddenly, things are seen as being malicious. Out-of-order execution suddenly becomes a side-channel attack and someone is listening to what your processor is doing. It is eavesdropping. Is that a bug? Where is the bug? The bug is in the specification. The bug is in the way the system is constructed.

Fish: It is hard to quantify security. It is hard to optimize anything that cannot be quantified. It is like playing whack-a-mole. Every time there is a breach you learn how to stop that class of problem.

Read more

Open Source Processors: Fact Or Fiction?

By Brian Bailey, Semiconductor Engineering | Feat. Raik Brinkmann, President & CEO, OneSpin

Calling an open-source processor free isn’t quite accurate.

Open source processors are rapidly gaining mindshare, fueled in part by early successes of RISC-V, but that interest frequently is accompanied by misinformation based on wishful thinking and a lack of understanding about what exactly open source entails.

Nearly every recent conference has some mention of RISC-V in particular, and open source processors in general, whether that includes keynote speeches, technical sessions, and panels. What’s less obvious is that open ISAs are not a new phenomenon, and neither are free, open processor implementations.

Read more

Enabling the RISC-V Ecosystem

Semiconductor Engineering Blog by Tom Anderson, Technical Marketing Consultant, OneSpin

Industry initiatives are critical factors for processor family success.

Earlier this year, OneSpin’s Sven Beyer discussed the emerging RISC-V processor and some of its verification challenges. He stated that “RISC-V is hot and stands at the beginning of what may be a major shift in the industry.” In the few intervening months, it has become even more apparent that RISC-V is fundamentally changing system-on-chip (SoC) development. Dozens of commercial and open-source implementations of processor cores are available, and millions of SoCs have already shipped with embedded RISC-V processors. Two industry groups have been established to promote RISC-V and help grow the ecosystem of hardware, software, tools, and services.

For this post we’re taking a step back from the technical details to discuss these activities and the role that OneSpin is playing.

 

 

Read more

EDA Learns from Experience

By Chris Edwards, New Electronics | Feat. Dominik Strasser, Co-Founder and VP Engineering, OneSpin

Several years ago at the Design Automation Conference (DAC) the talk was of big data.

Chip designers could find rich seams of information and get each successive project completed faster by mining their own database. Such projects looked to be prime candidates because of electronic design automation’s (EDA) ability to generate enormous datasets.

Areas such as physical verification did prove able to play EDA’s version of Moneyball. GlobalFoundries mined its database of layouts to find the pathological cases more or less guaranteed to cause yield failures. With millions of transistors per design and a lot of designs passing through, identifying the trouble spots was not easy but it was achievable. But other areas found the idea of data mining to be more promise than reality.

Read more

Press Contact

Michelle Clancy
» send an e-mail
» +1 503-702-4732