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In the news

Week In Review: Design, Low Power

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By Jesse Allen, Semiconductor Engineering

EDA in the Cloud; Portable Stimulus 1.0; building SoCs with AI; NetSpeed uncorks AI-powered platform; Moortec unveils embedded monitoring system; eSilicon adds configurable 7nm IP platform.

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The Skies Over EDA Are Finally Cloudy

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By Tom Anderson, Semiconductor Engineering

EDA companies have been talking for years about providing access to their tools in the cloud, including more articles than I can count with titles about the EDA forecast being cloudy, clouds on the horizon, and so forth. The title of this post continues the dubious tradition of cloud-based puns, but there’s no future tense involved. Recent announcements from several EDA companies make it appear that cloud support is finally here and poised to become a mainstream vehicle for design and verification.

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Searching For A System Abstraction

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By Brian Bailey, Semiconductor Engineering

Without abstraction, advances in semiconductor design would have stalled decades ago and circuits would remain about the same size as analog blocks. No new abstractions have emerged since the 1990s that have found widespread adoption. The slack was taken up by IP and reuse, but IP blocks are becoming larger and more complex. Verification by isolation is no longer a viable strategy at the system level. Without abstraction, system-level verification becomes an increasingly daunting task.

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Accellera Approves New Portable Test and Stimulus Standard - Quote Sheet

By Accellera

The first release of the Portable Test and Stimulus Standard (PSS) by Accellera is the result of several years of hard work by industry experts. The PSS approach has the promise to revolutionize system-level verification and is entirely complementary to the role played by formal techniques.

— Raik Brinkmann, CEO and President, OneSpin Solutions

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FPGAs Becoming More SoC-Like

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By Ann Steffora Mutschler, Semiconductor Engineering

Lines blur as processors are added into traditional FPGAs, and programmability is added into ASICs.

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