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In the news

Debugging Debug

Semiconductor Engineering logo

By Brian Bailey, Semiconductor Engineering

Can time spent in debug be reduced?

There appears to be an unwritten law about the time spent in debug-it is a constant.

It could be that all gains made by improvements in tools and methodologies are offset by increases in complexity, or that the debug process causes design teams to be more conservative. It could be that no matter how much time spent on debug, the only thing accomplished is to move bugs to places that are less damaging to the final product. Or maybe that the task requires an unusual degree of intuition plus logical thinking.

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Verification Of Functional Safety

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By Brian Bailey, Semiconductor Engineering

Part 2 of 2: How should companies go about the verification of functional safety and what tools can be used?

The automotive industry is grappling with a tradeoff between cost and safety. Safety is well understood in industries that are cost-insensitive, such as aerospace and medical, and the consumer industry has a long track record of driving down costs while increasing functionality. But can these two industries be brought together in a safe and effective manner to enable automobiles to achieve the goal of autonomous driving?

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JasperGold and OneSpin both get #11 in 2017 for "Best of" EDA tools

By John Cooley, Deepchip.com

WHAT GOES UP... This year, both JasperGold and OneSpin are present; but with far less user gush. They were NOT fidget spinners. They weren't fads. And they didn't do anything wrong. The fact that they work led to them being taken for granted. Other tools just took the attention in 2017. Fame is fickle like that.

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DVCon US 2018 preview: OneSpin Solutions

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Formal verification specialist OneSpin Solutions will demonstrate a number of its technologies during DVCon US in San Jose later this month (Feb 26-Mar 1). These will include 360 EC-FPGA, Quantify Fault Observation Coverage and SystemC/C++ Formal Verification Environment, as well as. Other demonstrations will showcase OneSpin’s safety-critical formal verification solutions for automotive and mission-critical applications. The company will be based at Booth #902.

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The Week In Review: Design

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By Jesse Allen, Semiconductor Engineering

OneSpin’s tool development and testing process has been audited by TÜV SÜD, allowing the company to provide certified formal verification solutions meeting tool qualification requirements set by functional safety standards ISO 26262, IEC 61508 and EN 50128/SIL 3. OneSpin plans a series of Tool Qualification Kits to speed up the process of tool qualification for users, beginning with one for EC-FPGA, an automatic sequential equivalence checker that prevents FPGA design flows from introducing synthesis, place-and-route and other implementation errors.

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Bridging Machine Learning’s Divide

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By Brian Bailey, Semiconductor Engineering

Why new approaches are needed to tie together training and inferencing.

There is a growing divide between those researching Machine Learning (ML) in the cloud and those trying to perform inferencing using limited resources and power budgets.

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Predictions: Markets And Drivers

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By Brian Bailey, Semiconductor Engineering

Part 1: What advancements can we expect to see in 2018, which markets will drive the industry, and what are the major challenges that have to be addressed?

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Giant Auto Industry Disruption Ahead

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By Ed Sperling, Semiconductor Engineering

Autonomous vehicles will cause fundamental shifts across a number of established industry segments tied to automotive, opening up big opportunities for chips and tools.

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