FPGA Equivalence Checking for a Nuclear Safety Controller
By Rob van Blommestein, Head of Marketing at OneSpin
OneSpin user discusses challenges and solutions for a critical design
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Every chip development team wants to find and fix all the bugs they possibly can in pre-silicon verification. Turning a chip to fix issues found in the bring-up lab incurs high costs and product delays; bugs found in the field are even more expensive to repair. But for some applications, including military/aerospace, implanted medical devices, and autonomous vehicles, the consequences of a faulty chip can be deadly. Electronic systems for nuclear power plants are another clear example of designs with extremely high standards for verification. At OneSpin’s inaugural Osmosis users’ group meeting in Munich, one of our expert users presented a riveting talk on formal equivalence checking for FPGA designs used in nuclear applications.
