close By using this website, you agree to the use of cookies. Detailed information on the use of cookies on this website can be obtained on OneSpin's Privacy Policy. At this point you may also object to the use of cookies and adjust the browser settings accordingly.

Cutting through the AI hype with OneSpin’s Raik Brinkmann

By Dr. Lauro Rizzatti, Tech Design Forum

Artificial intelligence (AI) and its two main offshoots, machine learning (ML) and deep learning (DL), are hot topics right now. But in actual fact. It can be traced back to a conference in 1956 at Dartmouth College. At the time, researchers considered designing systems that resembled characteristics of the human brain. But how far have we got in applying these technologies not only to improve the design tools themselves but also to address the new verification challenges presented by AI-based architectures?


Tech Design Forum logo

Raik: You can look at AI from different perspectives. The obvious question is, “Can we use artificial intelligence to make design verification easier?” I think this is the most interesting application, but also the most challenging and I don’t have a recipe yet for how to do that.

We are not at a point where you can say, “This is how you could make things easier for verification engineers,” whether in the formal, simulation or emulation areas. However, there are plenty of ideas on how to get data from verification projects, on monitoring and tracking verification activities performed by verification engineers over time, and on trying to make predictions on future verification projects. In general, our large customers are better equipped to handle the above because they work on several concurrent projects that cumulatively generate a large amount of data. They may even have tools to keep track of their progress. Verification is truly a big-data challenge.

EDA processes, especially verification, generate huge amounts of data, including the design-specific data, the verification requirements, the universal verification methodology (UVM) test environment, and others. You may conceive of using AI for analyzing and correlating the data and for a given design type. For example, you have communication chips with so many cores, and so many features. There, you might estimate how long it may take to verify them, and what level of efforts might be required.


Related Links