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Partitioning Drives Architectural Considerations

By Ann Steffora-Mutschler, Semiconductor Engineering

Semiconductor Engineering sat down to explore partitioning with Raymond Nijssen, vice president of system engineering at Achronix; Andy Ladd, CEO at Baum; Dave Kelf, chief marketing officer at Breker; Rod Metcalfe, product management group director in the Digital & Signoff Group at Cadence; Mark Olen, product marketing group manager at Mentor, a Siemens Business; Tom Anderson, technical marketing consultant at OneSpin; and Drew Wingard, CTO at Sonics. What follows are excerpts of that discussion.

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Anderson: Partitioning for flexibility is another dimension. And yes, having the FPGA option is also true. But even with traditional hardware-software tradeoffs, that’s also one of the factors, and the reasons you choose to implement something in software or in the microcode, let’s say, would be the flexibility. If the bus standard is not finalized, you want to get your chip out, and maybe they’re going to tweak things a little bit so put some of that in software. But yes, having the FPGA option to actually have flexible hardware, that’s something fairly recent and kind of interesting.

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