Capability Enables Functional Verification of High-Level SystemC Code
SAN JOSE, CALIF. –– February 24, 2015 –– OneSpin® Solutions, provider of innovative formal verification and formal equivalence checking solutions, today announced that OneSpin 360 DV™ now supports the SystemC language, delivering the first SystemC Assertion-Based Formal Verification Solution.
The addition of SystemC is a natural extension of the OneSpin 360 DV tool suite, allowing engineers to receive the full benefits of formal Assertion-Based Verification (ABV) and automated design inspection solutions for their SystemC design code. Both C language assertions as well as the SystemVerilog Assertion...
Quantify’s Patented Technology Drives Coverage Accuracy Across Existing Verification Flows
SANTA CLARA, CALIF. –– February 19, 2014 ––OneSpin Solutions™, provider of innovative formal assertion-based verification (ABV) and formal equivalence checking solutions, today announced Quantify™, patented software already proven in integrated circuit (IC) development environments to increase the precision with which verification coverage may be measured.
“While coverage measurement has been an essential element of the verification process, established methods have shortcomings that lead to the increased risk of post-production bugs and elongated engineering schedules,” says Dr. Raik...
Increases Adoption of Formal Assertion-Based Verification Software for ASIC, FPGA Designs
SANTA CLARA, CALIF. –– January 16, 2014 –– OneSpin Solutions™, provider of innovative formal assertion-based verification (ABV) and formal equivalence checking solutions, finished 2013 with 100% revenue growth, doubling revenue and tripling year-to-year bookings for a 200% growth over 2012.
Adoption of OneSpin’s formal verification software increased for both application specific integrated circuit (ASIC) and field programmable gate array (FPGA) designs in 2013. This lead to growth in business from existing customers as well as an increased number of new customers ...