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Conference talks and presentations

Listen to our experts' keynotes or follow the presentations given during one of our conference presences.

RISC-V Summit 2019

As the most significant event in the RISC-V movement, OneSpin exhibited at the RISC-V Summit 2019 in San Jose. While our verification experts were involved in numerous panel sessions, McKenzie Ross, director of corporate marketing, went out on the show floor and got together with key influencers of the RISC-V community.

RISC-V Summit 2019

OneSpin was reporting live from the RISC-V Summit 2019

DVCon US 2020

OneSpin at DVCon US, the leading event covering the application of languages, tools, and intellectual property for the design and verification of electronic systems and integrated circuits. 

DVCon US 2020

Watch all interviews from DVCon US 2020 in San Jose California.  

Formal Verification of RISC-V Cores

Salaheddin Hetalani, Field Application Engineer

Formal Verification of RISC-V Cores

Salaheddin Hetalani, field application engineer, talks about formal verification of RISC-V cores at Embedded World 2020 in Nuremberg, Germany.

Accelerating FPGA Development by Using DV Inspect

Salaheddin Hetalani, OneSpin Solutions

Accelerating FPGA Development by Using DV Inspect

Our field application engineer, Salaheddin Hetalani, is showing a demo about how to accelerate FPGA development flow by integrating OneSpin's DV Inspect.

Leveraging 20 Years of Formal Verification Data to Speed-up Today’s Proof

Dominik Strasser, VP of Engineering

Leveraging 20 Years of Formal Verification Data to Speed-up Today’s Proof

Speaker: Dominik Strasser
Recorded at: DVClub Europe Conference 2019
Date: 16th Apr 2019

Ensure Compliance and Trust for RISC-V Cores and SoCs with Complete Formal Verification

Sasa Stamenkovic, Senior Field Application Engineer 

Ensure Compliance and Trust for RISC-V Cores and SoCs with Complete Formal Verification

At the Verification 3.0 Innovation Summit on March 19th at Levi's Stadium in Santa Clara, California, OneSpin's Senior Field Application Engineer, Sasa Stamenkovic, discussed the importance of thoroughly verifying RISC-V processor cores—and outlined how formal verification can make that task easier.

Vadislav Palfy & Nicolae Tusinschi at DVCon US 2018

Vladislav Palfy, Director Application Engineering, and Nicolae Tusinschi, Product Specialist Design Verification

Vadislav Palfy & Nicolae Tusinschi at DVCon US 2018

Vladislav Palfy & Nicolae Tusinschi about the usage of mutation coverage for advanced bug hunting at DVCon US 2018.

Sasa Stamenkovic at DVCon US 2018

Sasa Stamenkovic, Senior Field Application Engineer

Sasa Stamenkovic at DVCon US 2018

Our senior field application engineer, Sasa Stamenkovic, in his joint session with Ravi Ram from Xilinx on formal verification of floating-point hardware with assertion-based vip.

Vladislav Palfy at DVCon Europe 2017

Vladislav Palfy, Director Application Engineering

Vladislav Palfy at DVCon Europe 2017

Vladislav Palfy, Global Manager Application Engineering, attended a panel about intelligent automation at DVCon Europe 2017.

Sergio Marchese at DVCon Europe 2017

Sergio Marchese, Technical Marketing Manager

Sergio Marchese at DVCon Europe 2017

Sergio Marchese, technical marketing manager at OneSpin, talks about formal fault propagation analysis that scales modern automotive SoCs.

Sven Beyer with Calista Redmond from RISC-V

Sven Beyer, Chief Scientist

Sven Beyer with Calista Redmond from RISC-V

Calista Redmond, CEO of the RISC-V Foundation, interviews OneSpin's Sven Beyer at the RISC-V booth at Embedded World 2020 - Nuremberg, Germany

Tom Anderson Speaks with EDA Cafe

Tom Anderson, Technical Marketing Consultant

Tom Anderson Speaks with EDA Cafe

Interview with Tom Anderson, Technical Marketing Consultant of OneSpin Solutions, at DVCon 2019.

Xilinx Talks Safety with OneSpin

Sasa Stamenkovic, Senior Field Application Engineer

Xilinx Talks Safety with OneSpin

Sasa Stamenkovic, senior field application engineer, sat down with Xilinx's senior director of architecture, Sagheer Ahmad, to speak about the challenges of moving into the automotive space even for a company with longstanding experience in other safety-critical domains.

Vladislav Palfy with EDA Cafe at DVCon US 2018

Vladislav Palfy, Director Application Engineering

Vladislav Palfy with EDA Cafe at DVCon US 2018

Vladislav Palfy, Director Application Engineering, got interviewed by Sanjay Gangal from EDA Cafe at this year's DVCon US in San Jose.

Artificial Intelligence and Convolutional Neural Networks

Jim Hogan, Vista Ventures, and Raik Brinkmann, CEO and President

Artificial Intelligence and Convolutional Neural Networks

Jim Hogan guided our CEO Raik Brinkmann and other industry thought leaders through an exploration of artificial intelligence, its applications, and predictions about how it stands poised to change every corner of the tech world.