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Agile Design Evaluation

Early, automated design code verification without simulation stimulus for rapid design iterations

The early elimination of bugs in an IC development process saves time and energy. This places pressure on component designers to perform more verification. However, given traditional simulation-based verification techniques, the ultimate result of this trend is designers spending more time creating stimulus and getting involved with overall verification, and less on creative design.

OneSpin’s Design Evaluation Solution enables closed-loop agile hardware design iterations without the need to write test stimuli, removing burdensome aspects of verification from the designers.

Why Agile Hardware Design?

The Agile software development movement has proposed a more interactive development methodology, in an attempt to restore creativity and reduce administrative boundaries. Agile suggests an interactive model where designers create, quickly test, and integrate small, valuable code sections. These ideas translate well into the IC hardware design process in general, but require new thinking in terms of verification techniques.

Today, design teams employ varying solutions to get their code right. These include manual inspection, Linting tools to highlight possible coding issues, and both interactive and batch simulation. Simulation allows design operation to be observed but requires a fair amount of setup and testbench creation. Linting reduces set-up overhead, and performs a useful but relatively “dumb” check that highlights possible errors, requiring sifting through lots of data to identify real issues.

Agile Hardware Design Process

What is required is a verification solution with a low setup and usage overhead that demonstrates design operation without stimulus creation, automatically tracks real design issues without pages of false negative results, and allows code optimizations to be checked at the push of a button.


Using formal technology as an enabler, OneSpin’s Design Evaluation solution provides:

  • The ability to witness and observe design operation with no or little stimulus, graphical manipulation or scenario setup. Allows a designer to see what is going on in the code, quickly and effortlessly. Test creation is automated for later simulation, if necessary.
  • Static design inspection to check for a number of issues at a formal level, examining code operation for real problems rather than code syntax for possible issues. Saves hours of log file analysis while detecting tougher bugs.
  • Sequential RTL comparison, which checks that a code update for optimization or style improvement, has not changed design functionality. Reduces additional simulation overhead.
  • Other automated apps to ensure correct protocol usage, X state elimination after reset, etc. simplifying specific time consuming tasks.

More information…

OneSpin 360 DV-Inspect™ takes designer’s pain away and automatically and exhaustively analysis RTL source code prior to functional verification and synthesis, eliminating hard to find implementation errors early in the design process.

»Learn more about DV-Inspect™…

OneSpin 360 DV-Verify™ goes beyond that by providing a unified, coverage-driven assertion-based verification flow, and including a full verification app library, as well as means for easy design exploration, all in one tool.

»Learn more about 360 DV-Verify™…

OneSpin 360 EC-RTL is an easy to use Sequential Equivalency Checking tool that to ensures functional equivalence between RTL design revisions.

»Learn more about 360 EC-RTL…

The OneSpin 360 Design Verification (DV) product line leverages the most advanced, high-performance formal technology as the basis for a range of verification solutions, from automated design analysis to advanced property checking.

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OneSpin 360 DV-Verify extends the DV- Inspect platform with coverage-driven Assertion-Based Verification (ABV). Many entry-level formal apps allow for assertion generation for specific problems without a need for deep formal knowledge.

»Download the data sheet…

360 DV-Inspect automatically inspects the RTL code once it has been compiled, without the need for any testbench setup.

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"We had a positive experience in adopting formal verification within a RTL development process that implemented Agile-recommended practices in a localized, low-risk fashion. This approach appears to be an effective and pragmatic way to improve the RTL development process by harnessing some of the benefits of Agile." Sergio Marchese, Verification consultant at TeraStatic.

»Read the full article on Tech Design Forum…

"The incremental approach allows for feedback between teams far, far sooner than would typically happen using a waterfall approach. The feedback exchanged between teams that are working toward the same goals simultaneously gives many more opportunities to clarify design intent and holds far less potential for long schedule slips." Neil Johnson, Principal Consultant – XtremeEDA Corp., Bryan Morris, VP Engineering – XtremeEDA Corp.

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"Agile development techniques are now sweeping through the software community transforming the way we develop software. But apart from a few isolated reports the hardware community has been largely untouched by this revolution." François Cerisier and Mike Bartley, Test and Verification Solutions.

»Read the full article on Design & Reuse…

"While there are obvious differences between software development and hardware development, there are also significant similarities. The key for hardware developers is to resist getting caught up with the differences and to instead focus on the similarities. Doing so makes it hard to argue that the values of the agile manifesto and agile practices could not be used to achieve the same benefits that software developers have been realizing for years." Neil Johnson, Principal Consultant at XtremeEDA Corp.

»Read the full article on EE Times…

We are uncovering better ways of developing software by doing it and helping others do it. Through this work we have come to value:

»Read the complete Agile Manifesto…

Get in touch!

Learn more about agile design evaluation with OneSpin!

portrait of Sven Beyer

Sven Beyer, Product Manager Design Verification

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