Scalable integration verification and functional analysis using automated apps
The integration of IP into larger blocks and sub-systems continues to require greater degrees of verification resources. Hierarchical bus and network structures, intricate power control and clocking schemes, and security functionality are all commonplace on these devices, making their verification complex and multi-faceted. Formal techniques can be applied effectively at this level to provide much of the integration and functional analysis required, and indeed many verification tasks may be automated.
OneSpin’s Block Integration Verification Solution leverages formal technology using a range of automated apps that are particularly effective for the integration task, as well as for other phases of the development flow.
Integration and functional check of combined modules
The framework for these blocks might be created right at the beginning of the design process, where the designers fill in components and the verification team builds tests and assertions to verify it over nightly regression runs. Alternatively, a complete SoC, including a processor sub-system, might come together later in the design process.
Either way, IP and block integration requires both integration and functional checks of the combined modules. These checks are traditionally performed using simulation, but given the scale of these sub-systems, setting up simulation runs to exhaustively test these areas has become a difficult and time consuming task.
Block Integration Validation using Formal Apps
Formal apps save significant effort on otherwise time consuming and error prone tasks. It is possible to automatically check a number of standard integration requirements, including the connectivity of key signals, the addressing and operation of registers, and the use of standard communication protocols.
OneSpin provides a range of automated apps that are particularly effective for the integration task, as well as for other phases of the development flow. These may be used to reduce simulation and/or emulation effort:
- Structural Analysis: Focused formal-based structural code analysis
- Safety Checks: Operational checks for standard coding problems
- Activation Checks: Ensuring that code segments can be activated
- Score Boarding: Ensuring functional communication channel integrity
- Protocol Compliance: Validating the implementation of bus protocols
- Register Checks: Comparing registers to an IP-XACT address map
- Connectivity Checking: Ensuring key connectivity through device structures
- X-Propagation Checking: Power-up and potential instability checks
Functional Block Integration Checks
In addition, various users have developed methodologies where the IP blocks contain assertions assuring their integration and cross execution with other platform components. These techniques have been shown to generate 7-9X time saving over simulation, both in terms of tool execution and test development time (Renesas Case Study).
Domain Specific Integration
Validation More applications solving integration tasks are available from partner companies. These apps have been developed by domain experts using the OneSpin 360 LaunchPad™ capability that allows the integration of the OneSpin formal platform into the third party products:
- Security Verification: Checking hardware security mechanisms on an SoCs
- Specification Validation: Advanced system register specification validation