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Metric-Driven Verification

Comprehensive assertion-based verification with unique observation coverage

A thorough and complete test of all blocks in an IC is absolutely essential. A single bug in a production IC will be expensive to fix and can cause catastrophic product failure in the field. Block level verification has traditionally made use of complex stimulus systems, employed across multiple batch mode simulation runs. Even with this verification horsepower, it often proves hard to achieve verification closure, especially when based on simulation code coverage metrics.

OneSpin’s metric-driven verification solution provides formal assertion-based verification, including a unique, accurate formal code coverage analysis that integrates with simulation coverage results.

Combining Formal Verification and Simulation

Random stimulus methods and the Unified Verification Methodology (UVM) have improved the ability to produce effective test vectors, but with a corresponding increase in verification environment complexity. Current UVM simulation solutions have significant drawbacks, including an inability to efficiently set up complex scenarios to ensure that all block functionality is tested. This leads to a decelerating, asymptotic coverage progress curve that rarely reaches 100%.

Formal verification solutions that operate in a complementary manner to simulation can solve this coverage issue. As a formal tool maintains the entire state-space of the block under test, the complexity of creating certain test scenarios is reduced. Assertions are used to express functional properties to be either proven or disproven, and in this manner the most complex scenarios are fully investigated.

A number of companies today employ methodologies where the verification test plan is examined to understand which test scenarios are better served by simulation with UVM testbenches, and those that benefit from a formal approach using assertions. The tools are applied as appropriate and coverage information collected to understand overall progress. Using this two-pronged approach, complex scenarios are analyzed earlier in the process and bug free coverage is achieved more rapidly.To enable a closed loop, metric-driven verification solution, OneSpin’s Quantify technology, a precise coverage mechanism that makes use of an “Observation Coverage” algorithm, is applied.

In order to execute a variety of scenarios in a reasonable timescale, and to contain the entire block under test, a superior level of formal technology is required. OneSpin’s 360 DV-Verify award winning product contains a highly optimized formal model and leverages a broad range of formal algorithms to ensure the design is tested as quickly and efficiently as possible. In addition, the solution contains advanced debug and ease-of-use features that simplifies tracking and debugging problems.

Coverage for Formal Verification

To enable a closed loop, metric-driven verification solution, OneSpin’s Quantify technology, a precise coverage mechanism that makes use of an “Observation Coverage” algorithm, is applied.

The observation coverage algorithm analyzes the code to ensure that any change will trigger at least one assertion, providing both an overall measure of coverage, as well guidance to particular coverage holes.


More information…


OneSpin 360 DV-Verify™ goes beyond that by providing a unified, coverage-driven assertion-based verification flow, and including a full verification app library, as well as means for easy design exploration, all in one tool.

»Learn more about 360 DV-Verify™…

OneSpin 360 DV-Verify™ goes beyond that by providing a unified, coverage-driven assertion-based verification flow, and including a full verification app library, as well as means for easy design exploration, all in one tool.

»Learn more about the Quantify Coverage App…

By using Quantify in the manner illustrated in the talk, both designers and verification engineers can get continuous feedback as they develop their assertion based verification test environments and gain knowledge of when they will be ready for sign-off.

»Download the presentation…

An effective measure of verification progress, together with guidance towards design areas remaining untested, requires a precise view of the test coverage achieved. To risk signing off the verification process without understanding the quality of testing raises the specter of post-production device bugs. OneSpin Solution’s patented Quantify technology employs Observation Coverage, which evaluates the effectiveness of a set of assertions being triggered by incorrect behavior in the design code.

»Download the white paper…

The increased deployment of silicon intellectual property (IP) blocks is vital to boosting productivity in the development of large, complex system-on-chip (SoC) designs. But the increase in SoC design productivity is not matched by as great an increase in SoC verification productivity. Managers and engineers still struggle with a persistent “verification productivity gap.” Why? Because there is a persistent IP verification quality gap, too. The resulting uncertainty about the original verification quality of individual IP blocks often requires time-consuming remedial verification by the SoC design team. The alternative is to risk SoC design failure because of inadequate IP verification, which ultimately delays the project even more.

»Read the full article on EE Times…

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Learn more about metric-driven verification with OneSpin!

portrait of Sven Beyer

Sven Beyer, Product Manager Design Verification

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