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56th Design Automation Conference

Team OneSpin thanks you for a great year!

Raising a Glass to IC Integrity at DAC

It was a banner year for OneSpin at the 56th Design Automation Conference (DAC), which was held June 2–6 at the Las Vegas Convention Center in Las Vegas, Nevada. Thank you to all who stopped by our biergarten exhibit booth to learn about IC integrity, enjoy an authentic Bavarian pretzel, or raise a toast to IC integrity with a frosty Hofbräuhaus beer!

ICYMI, here's a summary of what we showcased at DAC in the realm of IC integrity—our latest solutions for building functionally correct, safe, trusted, and secure integrated circuits:

Latest Functional Correctness Solutions

  • Verification Planning Integration and Verification Coverage IntegrationTwo Great Apps that Go Great Together to Minimize Overlap Between Formal and Simulation 
  • Operational Assertions – Turbocharge Your Assertions for More Expressive Power and Better Formal Performance
  • Connectivity XLKicking Formal Connectivity Checking Up to the Multi-Billion Gate Notch 
  • Floating-Point Unit VerificationAre Your Machine Learning and Deep Learning Chips Up to Snuff?
  • Equivalence Checking for Big Data, High-Bandwidth ApplicationsWhen High Optimization and Quality of Results Matter
  • Trying to Understand Your Coverage Making You Cross-Eyed? Get a Clear Picture with OneSpin PortableCoverage
  • Take the Risk Out of Implementing RISC-V – Complete Verification Is Quickly Achievable

Latest Safety Verification Solutions

  • Fault Contribution AnalysisSafety-Aware SoC Partitioning for Automated, ISO 26262-Compliant FMEDA 
  • Fault Detection AnalysisAccurate Diagnostic Coverage with no Testbench or Fault Simulation Required
  • Don’t Get Lost on the Road to Hardware SafetyLet OneSpin ISO 26262 Safety Solutions Guide Your Way

Latest Trust and Security Solutions

  • RISC-V Trust AssuranceThe Bad Stuff Can’t Hide

Want to learn more?

This is just the latest in our suite of verification offerings. Our experts are keen to learn more about the design and verification challenges that your team is facing. Let's schedule a call or a face-to-face meeting to explore your upcoming design projects and brainstorm about how we can work together to achieve your verification goals.

Conference Content

OneSpin’s experts shared their knowledge and insight across the conference program at DAC in the following sessions:

Unbounded Formal Verification of RISC‑V CSRs with Interval Property Checking

In Monday's Designer Track session on New Frontiers in Formal and Static Verification, Product Specialist Design Verification Nicolae Tusinschi illustrated the importance of verification when incorporating RISC-V and discussed how formal verification can help designers to proceed with confidence. At the poster networking reception later that same evening, Nicolae had a chance to answer questions from eager attendees who weren't able to ask theirs during his sessions Q&A session. 

Advances in Formal Connectivity Checking – A Case Study on a Multi-Billion-Gate SoC

During Monday evening's Designer/IP Track Poster Networking Reception, Senior Field Application Engineer Sasa Stamenkovic presented OneSpin's joint work with Xilinx surrounding our Connectivity XL verification technology for tackling connectivity checking in exceptionally large and complex designs. DAC General Chair Rob Aitken stopped by to talk with Sasa as he made his rounds of the session. 

Cooley's DAC Troublemaker Panel

President & CEO Raik Brinkmann was the mystery guest on John Cooley's DAC Troublemaker Panel this year! In front of a packed room, Raik showcased OneSpin's impressive annual growth over the past four years and highlighted the areas where we're making a real difference in IC integrity and offering solutions that the Big Three and others simply cannot. 

Want to dig into the technical details? Download the presentation slides, posters, and our IC Integrity summary!

Media Coverage of OneSpin at DAC


OneSpin Was Creating a Buzz Even Before DAC Began

Prior to the conference, we were all over John Cooley's Cheesy Must See List in the following categories:

RISC-V vs. Arm

FPGA Stuff—Featured #1!


SystemC/C/C++/TLM Stuff—Featured #1!

Thanks, John! We always appreciate being featured on DeepChip!

The Press Coverage Continues

For other articles, roundtable discussions, and blogs from DAC and beyond, please visit our In the News page.