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The osmosis 2023 agenda is live!

Elevate your success with osmosis 2023

Osmosis is about sharing success in using formal techniques to solve verification challenges, and networking with our R&D experts and other attendees. As such, we have put together the following conference program covering a wide range of formal verification topics – along with delivering sneak-previews of our future product roadmaps.

Conference program

Check-in and continental breakfast - doors open at 8:00 AM, Program starts at 9:00 AM



Limits of verification: learnings from catastrophic system failures Philippe Luc - Codasip
Spectres, Meltdowns, Zombies, Orcs:  How formal methods could banish the ghosts that haunt our computing systems Prof. Wolfgang Kunz - RPTU
How to sign-off cryptographic hash implementations with generated formal assertions Tobias Ludwig - Lubis EDA
Debugging enhancements for formal property checking Holger Busch - Infineon


Reducing formal verification runtime in SystemC utilizing modular interface Hideki Kazama - Sony
Hierarchical verification flow for FPGA design projects Mamma Benmoussa Garsault - Arcys
Safeguarding datapath integrity and compliance with formal security verification Keerthi Devarajegowda - Siemens
Combined formal and functional verification approach for digitally controlled analog frontend Mihajlo Katona - Veriest
Formal technology update and roadmap Chris Giles, Siemens


Register here: 


If you have any questions (including whether if you could “bump” one of our R&D presenters to share your formal verification story), email with the "osmosis” keyword in the subject header.

We look forward to seeing you!!!

The Siemens Formal Verification Team

* The agenda and speakers are subject to change without notice.