Do Parallel Tools Make Sense?
By Brian Bailey, Semiconductor Engineering
Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for Oski Technology; and Bill Mullen, senior director for R&D at ANSYS. What follows are excerpts of that conversation.
Palfy: You mentioned cloud computing. There are a lot of companies that cannot afford their own farms. We have a cloud solution that we implemented to safely go into the cloud and to consume whatever compute power they needed, but it raises another question, which is security. We guarantee that data cannot be intercepted and cannot be interpreted, and people are willing to keep their finances online, their company data, but if you ask them to upload an encoded verification problem, they get very worried. There are select people who do it, but it is difficult.
