Merging Verification With Validation
By Brian Bailey, Semiconductor Engineering
Verification and validation are two important steps in the creations of electronic systems and over time their roles, but how they play together is changing. In fact, today we are seeing a major opportunity for rethinking this aspect of the flow, which could mean the end of them as separate tasks for many of the chips being created.
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Tom Anderson, technical marketing consultant for OneSpin Solutions, takes this one step further. “A portable stimulus tool can, from a single high-level model, generate tests tuned for each verification and validation platform. These tests include the code to run on the embedded processors and, when needed, access the chip inputs and outputs via the available mechanisms for each platform. This makes it possible to check verified functionality on a validation platform, decreasing the amount of time needed to get production software running. It also allows bugs found during validation, or even during bring-up of fabricated chips, to be reproduced in simulation for easier debug.”
