Using More Verification Cores
By Brian Bailey, Semiconductor Engineering
Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for Oski Technology; and Bill Mullen, senior director for R&D at ANSYS. What follows are excerpts of that conversation.
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Palfy: We went into automotive only to find customers doing fault propagation by hand. It was working for them up until a certain point. But now they need to be faster, and the ISO standards are forcing them to change. We are the big shots because we have the knowledge, because we built that up in other domains, and now we can apply it to something completely different.
