Datasheet 360 DV
The OneSpin® Design Verification (DV) product suite leverages a powerful, high-performance formal verification proof engine as the basis for a range of tools, from automated design analysis to advanced property checking. The capabilities are designed to be as fast and easy to use as possible, and come with a range of pre-packaged assertion solutions that target common verification problems.
Datasheet 360 DV-Inspect
Part of the 360 DV product family, 360 DV-Inspect increases the productivity of existing RTL design and verification flows by adding push-button formal analysis. The 360 DV product family is the most comprehensive formal Assertion-Based Verification (ABV) solution for RTL designs. 360 DV covers the broadest range of formal ABV applications for formal verification novices, experienced users and experts – from fully automatic RTL checks all the way to OneSpin‘s patented, highest quality GapFreeVerification.
Datasheet 360 DV-Verify
360 DV-Verify brings to the RTL design and verification community a powerful platform to effectively and smoothly deploy formal assertion-based verification (ABV) within existing flows. Part of the 360 DV product family, 360 DV-Verify is a versatile and mature product successfully used on hundreds of designs.
Datasheet 360 DV-Certify
360 DV-Certify enables formal verification experts to systematically verify RTL functionality. Being the most advanced member of the 360 DV product family, 360 DV-Certify automatically detects verification gaps and supports a highly productive assertion development flow.
Datasheet 360 EC-RTL
Part of the 360 EC product family, OneSpin 360 EC-RTL performs sequential equivalence checking between two RTL designs. OneSpin 360 EC product family offers an array of formal equivalence checking tools which exhaustively verify that one representation of a design and another version of the same design are functionally equivalent.
Datasheet 360 EC-FPGA
The OneSpin® 360 EC-FPGA™ solution ensures that advanced FPGA synthesis optimizations, used to achieve competitive functionality, performance, power consumption, and cost targets, do not introduce functional errors. It supports all sequential synthesis optimizations performed in FPGA design flows. 360 EC is in use at multiple companies, as an accuracy gold standard to test their design solutions.