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By Brian Bailey, Semiconductor Engineering

The open-source RISC-V instruction set architecture (ISA) is attracting a lot of attention across the semiconductor industry, but its long-term success will depend on levels of cooperation never seen before in the semiconductor industry. The big question now is how committed the industry is to RISC-V’s success.

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By Paul McLellan, Cadence Breakfast Bytes Blogs

Yesterday was the first part about the ESD Alliance Digital Marketing workshop. Today, it is part 2 (of 2).

Today's marketers need to be hands-on since there are a lot of different aspects and it is too slow (not agile) to have to use different organizations for everything. Getting from here to there requires training, and there is a lot around. I'm going to skip over a lot of what Nicolas said and jump to his recommendations. Note that these recommendations are for small and medium-sized companies. In a big company, there will almost certainly be a CRM system like Salesforce already in place, and perhaps other tools too.

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By Tom Anderson, Electronic Design

Formal verification, which uses mathematical analysis rather than simulation tests, has been available in commercial EDA tools for more than 20 years and in academia much longer. As with many new technologies, initial adoption was slow and limited to companies who had in-house formal experts. This has changed dramatically in the last dozen years or so. Almost every chip-development team makes some use of formal tools, and the market continues to grow. Nevertheless, some myths about formal persist, and they may still be deterring some engineers who could benefit from it. It’s time for the truth to be told.

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By Paul McLellan, Cadence Breakfast Bytes Blogs

Last week the ESD Alliance ran another workshop on digital marketing, with Nicolas Athanasopoulos of OneSpin and Dave Kelf (now at Breker, but who used to work with Nicolas at OneSpin).

Nicolas had two main messages:

- Digital marketing requires agility: start small, analyze, optimize, and repeat.

- Training is key: there are a lot of digital marketing tools.

By Brian Bailey, Semiconductor Engineering

Domain crossings can produce thousands of waivers. How does a team put in place a methodology for dealing with them?

Semiconductor Engineering sat down to discuss problems associated with domain crossings with Alex Gnusin, design verification technologist for Aldec; Pete Hardee, director, product management for Cadence; Joe Hupcey, product manager and verification product technologist for Mentor, a Siemens Business; Sven Beyer, product manager design verification for OneSpin; and Godwin Maben, applications engineering, scientist for Synopsys. What follows are excerpts of that discussion.

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By Ann Steffora Mutschler, Semiconductor Engineering

The ISO 26262 spec is a household term for anyone even remotely involved with the automotive industry today. Increasingly, though, it is being used interchangeably with safety-readiness across the entire supply chain.

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By Ann Steffora-Mutschler, Semiconductor Engineering

RISC-V is pushing further into the mainstream, showing up across a wide swath of designs and garnering support from a long and still-growing list of chipmakers, tools vendors, universities and foundries. In most cases it is being used as a complementary processor than a replacement for something else, but that could change in the future.

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By Brian Bailey, Semiconductor Engineering

Semiconductor Engineering sat down to discuss problems associated with domain crossings with Alex Gnusin, design verification technologist for Aldec; Pete Hardee, director, product management for Cadence; Joe Hupcey, product manager and verification product technologist for Mentor, a Siemens Business; Sven Beyer, product manager design verification for OneSpin; and Godwin Maben, applications engineering, scientist for Synopsys. What follows are excerpts of that discussion.

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