close
By using this website, you agree to the use of cookies. Detailed information on the use of cookies on this website can be obtained on OneSpin's Privacy Policy. At this point you may also object to the use of cookies and adjust the browser settings accordingly.
By Ann Steffora-Mutschler, Semiconductor Engineering
Semiconductor Engineering sat down to explore these issues with Raymond Nijssen, vice president of system engineering at Achronix; Andy Ladd, CEO at Baum; Dave Kelf, chief marketing officer at Breker; Rod Metcalfe, product management group director in the Digital & Signoff Group at Cadence; Mark Olen, product marketing group manager at Mentor, A Siemens Business; Tom Anderson, technical marketing consultant at OneSpin; and Drew Wingard, CTO at Sonics. What follows are excerpts of that discussion.
OK, people: it’s time to talk again about how not to hurt or kill people (or other living things) with electronic gadgetry. Or more-than-gadgetry, like cars that have the temerity to drive themselves. There are so many angles from which to approach how all those functions in such machines can be made safe; we take on yet another one today.
This discussion stems from a conversation with OneSpin at this summer’s DAC. Seems like it was just about this time last year that we talked about how EDA and functional safety work together, but, based on some recent certification announcements, this year we have a view from a different stance.
My new, mid-size car is equipped with many advanced driver-assistance systems. To be honest, it’s taking me time to get used to some of them, as, for example, lane-centering assist that seamlessly takes control of my steering wheel. However, I cannot wait to get my hands off a fully autonomous vehicle and be able to take a nap while 7nm chips run machine learning and other artificial intelligence algorithms do the driving for me.
It’s an exciting time for anyone in the chip and electronic design automation (EDA) industry, asserts Dr. Raik Brinkmann, president and CEO of formal verification provider OneSpin. Dr. Brinkmann uses new computer architectures, breaking the Von Neuman principle and pushing computing to a different level as an example, and says that they offer an opportunity for agile EDA companies with significant technology portfolios.
Artificial intelligence (AI), however, captures Dr. Brinkmann’s imagination, and he is studying what it can do to help design and verify chips. Implementing AI applications on hardware, he begins, involves mapping algorithms developed for AI into a hardware platform that could be an ASIC, an FPGA, a DSP, or one that’s more sophisticated. Each has a verification challenge: verifying the algorithm.
CEO Raik Brinkmann answers the questions of Lauro Rizzatti around verification of hardware design targeted to artificial intelligence (AI) and AI applications implemented in hardware.
Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for Oski Technology; and Bill Mullen, senior director for R&D at ANSYS. What follows are excerpts of that conversation.
Chipmakers and test/validation companies are helping lead the effort to develop self-driving cars, but they are facing a wide range of technical and even cultural barriers.
Advanced driver assist systems (ADAS) already are the most complex systems by far in modern cars, the best of which hover between Level 2 and Level 3 on the five-step autonomy ladder maintained by the Society of Automotive Engineers (SAE) since 2016. To get to Level 3 and eventually Level 4 will require deep-learning and real-time decision-making, incorporating data from LiDAR, sonar, radar, vision systems, navigation, vehicle recognition and pedestrian recognition.
Are you ready for a virtual buffet of verification goodness? I hope so. In this week’s Fish Fry, we’re gobbling down as much verification as we possibly can fit on our podcastin’ plate. First up, Anupam Bakshi (Agnisys) joins us to dish on register specification, automatic memory verification, and UVM model integration. Next, Dave Kelf (Breker) serves up some delectable details about their new Trek Five product, the history of portable stimulus, and how Breker has been integral to the portable stimulus group at Accellera. To finish things up, Vladislav Palfy joins us to discuss the biggest trends in the world of formal verification.
